Parasitic Substrate Coupling in High Voltage Integrated Circuits 1st ed. 2018(Analog Circuits and Signal Processing) H XVII, 179
Buccella, Pietro, Stefanucci, Camillo, Kayal, Maher, Sallese, Jean-Michel 著
目次
Chapter1: Overview of Parasitic Substrate Coupling.- Chapter2: Design Challenges in High Voltage ICs.- Chapter3: Substrate Modeling with Parasitic Transistors.- Chapter4: TCAD Validation of the Model.- Chapter5: Extraction Tool for the Substrate Network.- Chapter6: Parasitic Bipolar Transistors in Benchmark Structures.- Chapter7: Substrate Coupling Analysis and Evaluation of Protection Strategies.
カート
カートに商品は入っていません。
